preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 1 of 8 high performance, constant cu rrent switching for white led and boost convertor general description the LP3390 is designed for constant- current white led driver applications. it can drive a string of up to 8 white led from a 3.3v supply or 3s9p white led from a 5v supply in series. to improve efficiency, the feedback voltage is set to 200mv, which reduces the power dissipation in the current setting resistor. LP3390 also has constant-voltage boost applications and fb voltage is 1250mv. LP3390 implements a constant frequency 1.2mhz pwm control scheme. the high frequency pwm operation also saves board space by reducing external component sizes. optimized operation frequency can meet the requirement of small lc filters value and low operation current with high efficiency. order information LP3390 f: pb-free package type qv:sqvf pin configurations features ? high efficiency: 95% ? 1.2mhzfixed-frequency pwm operation ? maximum output voltage up to 30v ? operating range : 2.7v to 6v ? shutdown supply current:<1ua ? available in sot23-6 package ? minimize the external component. ? rohs compliant and 100% lead (pb)-free applications ? wled backlight driver ? panel bias voltage supply typical application circuit marking information device marking package shipping LP3390qvf lps LP3390 xxxx qv:sqvf 3k/reel
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 2 of 8 functional pin description pin number pin name pin function 1 gnd ground pin 2 vin2 supply input voltage pin. bypass 1uf capacitor to gnd to reduce the input noise. 3 en2 chip enable (active high). voltage sensing input to trigg er the function of over voltage protection. note that this pin is high impedance. there should be a pull low 100k resistor connected to gnd when the control signal is floating. 4 fb1 feedback reference voltage pin. series connect a resistor between wled and ground as a current sense. sense the current feedback voltage t o set the current rating. fb voltage is 200mv. 5 sw1 switch pin. connect this pin to inductor and catch diode. minimize the track area to reduce emi. 6 vin1 supply input voltage pin. bypass 1uf capacitor to gnd to reduce the input noise. 7 ovp ovp pin. overvoltage sense. when vout is greater than 29v , the internal n-channel mosfet turns off until vout drops below 29v, then the ic reenters start. connect a 1uf capacitor from out to gnd 8 en1 chip enable (active high). voltage sensing input to trigg er the function of over voltage protection. note that this pin is high impedance. there should be a pull low 100k resistor connected to gnd when the control signal is floating. 9 fb2 feedback reference voltage pin. series connect a resistor between wled and ground as a current sense. sense the current feedback voltage t o set the current rating. fb voltage is 1250mv. 10 sw2 switch pin. connect this pin to inductor and catch diode . minimize the track area to reduce emi.
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 3 of 8 function block diagram
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 4 of 8 absolute maximum ratings ? supply input voltage------------------------------------------- ------------------------------------?0.3v to 5.5v ? lx input voltage ---------------------------------------------- --------------------------------------?0.3v to 36v ? ovp voltage---------------------------------------------------- --------------------------------------?0.3v to 32v ? the other pins ------------------------------------------------ --------------------------------------?0.3v to 5.5v ? power dissipation, pd @ ta = 25c sot-23-6 -------------------- ---------------------------0.455w ? lead temperature (soldering, 10 sec.) ------------------------- ------------------------------- 260c ? operation temperature range ----------------------------------- ---------------------------- -?40c to 80c ? storage temperature range ------------------------------------- --------------------------------?65c to 150c electrical characteristics parameter symbol test condition min typ. max units system supply input operation voltage range v dd 2.5 5.5 v under voltage lock out uvlo 2.3 v supply current i dd fb=0v, switching 0.8 1.3 ma shut down current i dd v en < 0.4v 0.1 1 ua line regulation v in : 3.0~4.3v 3 % oscillator operation frequency f osc 1.2 mhz maximum duty cycle 89 92 96 % dimming frequency 100 1m hz feedback1 voltage LP3390 185 200 215 mv feedback2voltage 1220 1250 1280 mv mosfet on resistance of mosfet r ds(on) 0.5 protection ovp threshold v ovp 29 v ovp sink current 5 a ocp 1250 ma shut down voltage v en 0.4 v enable voltage v en 1.5 v
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 5 of 8 application information led current setting the loop of boost structure will keep the fb pin voltage equal to the reference voltage vref. fb voltage is 200mv,therefore, when rset connects fb pin and gnd, the current flows from vout through led and rset to gnd will be decided by the current on rset, which is equal to following equation: dimming control a. using a pwm signal to en pin for the brightness dimming control of the LP3390, the ic provides typically 200mv feedback voltage when the en pin is pulled constantly high. however, en pin allows a pwm signal to reduce this regulation voltage by changing the pwm duty cycle to achieve led brightness dimming control. the relationship between the duty cycle and fb voltage can be calculated as following equation: v fb = duty x 200mv where duty = duty cycle of the pwm signal 200mv = internal reference voltage the duty cycle of the pwm signal is used to cut the internal 200mv reference voltage. an internal low pass filter is used to filter the pulse signal. and then the reference voltage can be made by connecting the output of the filter to the err or amplifier for the fb pin voltage regulation. however, the internal low pass filter 3db frequency is 500hz. when the dimming frequency is lower then 500hz, va is also a pwm signal and the led current is controlled directly by this signal. when the frequency is higher than 500hz, pwm is filtered by the internal low pass filter and the va approach a dc signal. and the led current is a dc current which elimate the audio noise. two figures of pwm dimming from en are shown in typical operating characteristics section and the pwm dimming frequency is 100hz and 1mhz respectively. but there is an offset in error amplifier which will cause the va variation. in low pwm duty signal situation, the filtered reference voltage is low and the offset can cause bigger variation of the output current. so the LP3390 is not recommend to be dimming by the en pin. for the LP3390, the minimum duty vs frequency is listed in following table: b. using a dc voltage using a variable dc voltage to adjust the brightness is a popular method in some applications. the dimming control using a dc voltage circuit. the output voltage can be calculated by the following equations. c. using a filtered pwm signal another common application is using a filtered pwm signal as an adjustable dc voltage for led dimming control. a filtered pwm signal acts as the dc voltage to regulate the output current. in this circuit, the output ripple depends on the frequency of pwm signal. for smaller output voltage ripple (<100mv), the recommended frequency of 2.8v pwm signal should be above 2khz. to fix the frequency of pwm signal and change the duty cycle of pwm signal can
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 6 of 8 get different output current. the led current can be calculated by the following equation. constant output voltage control the output voltage of the LP3390 can be adjusted by the divider circuit on the fb pin. the output voltage can be calculated by the following equations. power sequence in order to assure the normal soft start function for suppressing the inrush current the input voltage should be ready before en pulls high. soft-start the function of soft-start is made for suppressing the inrush current to an acceptable value at the beginning of power on. the LP3390 provides a built-in soft-start function by clamping the output voltage of error amplifier so that the duty cycle of the pwm will be increased gradually in the soft-start period. current limiting the current flow through inductor as charging period is detected by a current sensing circuit. as the value comes across the current limiting threshold, the n-mosfet will be turned off so that the inductor will be forced to leave charging stage and enter discharging stage. therefore, the inductor current will not increase over the cu rrent limiting threshold. ovp/uvlo/otp the over voltage protection is detected by a junction breakdown detecting circuit. once vout goes over the detecting voltage, lx pin stops switching and the power n-mosfet will be turned off. then, the vout will be clamped to be near vovp. as the output voltage is higher than a specified value or input voltage is lower than a specified value, the chip will enter protection mode to prevent abnormal function. as the die temperature is higher then 160c, the chip also will enter protection mode. the power mosfet will be turned off during protection mode to prevent abnormal operation. thermal considerations for continuous operation, do not exceed absolute maximum operation junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : where tj(max) is the maximum operation junction temperature, ta is the ambient temperature and the qja is the junction to ambient thermal resistance. for the recommended operating conditions specification of LP3390, the maximum junction temperature of the die is 125c. the junction to ambient thermal resistance qja is layout dependent.
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 7 of 8 layout consideration for best performance of the LP3390, the following guidelines must be strictly followed. - input and output capacitors should be placed close to the ic and connected to ground plane to reduce noise coupling. - the gnd and exposed pad should be connected to a strong ground plane for heat sinking and noise protection. - keep the main current traces as possible as short and wide. - lx node of dc-dc converter is with high frequency voltage swing. it should be kept at a small area. - place the feedback components as close as possible to the ic and keep away from the noisy devices.
preliminary datasheet LP3390 LP3390 version 1.0 datasheet nov.- 2013 www.lowpowersemi.com page 8 of 8 packaging information detail a pin#1 id and tie bar mark options note: the configuration of pin #1 identifier is optional, but m ust be located within the zone indicated. symbol dimensions in millimeters dimensions in inches min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 2.300 2.650 0.091 0.104 e 2.950 3.050 0.116 0.120 e2 1.500 1.750 0.059 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018
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